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Intel Ponte Vecchio: Sechs 7-nm-Xe-GPUs pro Aurora-Node



Ein paar Informationen vorneweg: Das was Intel Xe alias Gen12 bezeichnet, is the Architectur for the most modern dedicated graphics graphics since i740 from 1998. Designed to be modeled in Entwicklung, wovon wenigsten vom DG1 (Discrete Graphics 1) Silizium lauffähiges existiert. The Intel Supercomputer entwickelt is 7-nm-Ableger, including Ponte Vecchio als Codename and sturgeon Aurora, available from Exaflops-Supercomputer in USA.

Stellenmarkt

  1. PSI Software AG Geschäftsbereich PSI Energie EE, Aschaffenburg, Berlin
  2. sepp.med gmbh, Braunschweig / Wolfsburg

Auf der Derzeit im US-Denver stattfindenden Supercomputing 2019 has Intel provided the details of the Aurora and Ponte Vecchio genres: The system is equipped with both Exaflops and wired im Auftrag des US-Energieministeriums (Department of Energy, DoE) entwick soll 2021 im Argonne National Laboratory in Chicago in Betrieb genommen werden. This Rechenknoten des Aurora is best suited for only 7-nm-Xe-Beschleunigern and Xeon-CPUs, including Intel's Sapphire Rapids with 10 ++ nm Fertigung. The processors are DDR5-Arbeitsspeicher and do not support Optane Memory.

Jeder Ponte Vecchio has direct access to Ponte Vecchio Commands, Intel based on the Compute Express Link (CXL) version and verifies that the cache is currently running Sapphire Rapids with 7-nm-Xe-Beschleunigern. It is based on the Mischung aus 2.5D- and 3D-Packaging, including EMIB (Embedded Multi Die Interconnect Bridge) and Foveros. This is how they can be seen, as Intel brews in July 2019, from Designs with HBM2-Stapelspeicher and Logic-Dies to the same Träger. The Ponte Vecchio spricht der Hersteller generals from the On-Package-Cache schema, was HBM2E or HBM3.

Unless we have a Supercomputer equipped with Intel chipsets, all chips come with HPC-Segment unabdingbare Unterstützung von Berechnungen mit doppelter Präzision (Double Precision, FP64) with Geschwindigkeit. Some flexible Matrix- and Vector-Engines, including Intel also typify Algorithms for Lernen maschinellen in Hardware beschleunigen. At Aurora, the Intels OneAPI-Software-Stack system welcomes CPUs with FPGAs and GPUs all integrated.

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